The Simplecortex is a microcontroller development board that is shield compatible with the Arduino. The Simplecortex has a fast microcontroller, the LPC1769 from NXP. This is a ARM Cortex M3 microcontroller with 512KB flash, 64KB RAM and it runs at 120Mhz. To make sure that the Simplecortex is easy to use we made tutorials for almost every peripheral on the chip and examples to get you started. There are tutorials for simple stuff like IO control up to more advanced tutorials for MicroSD cards. If you have ideas for a new tutorial or made a tutorial yourself, feel free to drop an email or post it in the forum. The Simplecortex also has an onboard debugger. It can also be used to program external devices like a self made PCB for your own project. No more microcontrollers with pre-programmed bootloader needed. [ ]
The linear power supply , shown in the schematic, provides 0-30 volts, at 1 amp, maximum, using a discrete transistor regulator with op-amp feedback to control the output voltage. The supply was constructed in 1975 and has a constant current mode that is used to recharge batteries. With reference to the schematic, lamp, LP2, is a power-on indicator. The other lamp (lower) lights when the unit reaches its preset current limit. R5, C2, and Q10 (TO-3 case) operate as a capacitor multiplier. The 36 volt zener across C2 limits the maximum supply voltage to the op-amps supply pins. D5, C4, C5, R15, and R16 provide a small amount of negative supply for the op-amps so that the op-amps can operate down to zero volts at the output pins (pins 6). A more modern design might eliminate these 4 components and use a CMOS rail-to-rail op-amp. Current limit is set by R3, D1, R4, R6, Q12, R10, and R13 providing a bias to U2 that partially turns off transistors Q9 and Q11 when the current limit...
This is a digital circuit may arrive at your need, This circuit is a simple frequency comparator . The circuit Input 1 is used as a gating period, during which a single rising edge on input 2 will cause a logic 1 output-any other number, indicating non-identical frequencies causes a logic 0 output. ICla converts input 1 to a narrow pulse which initializes IC2 which forms a two-stage shift register clocked by input 2. Best Frequency Comparator Circuit Diagram On the first edge of input 2 a logic 1 appears on the output of IC2b and for all subsequent inputs a logic 0 is present. At the end of the gating period this output is latched by IC3 forming the lock output.As this is only valid for one input period a monostable is added to the output to enable, for example, visual monitoring of the output. Either output from IC3 can be used depending on which state is most important. As connected the failure state is indicated. Sourced by : Circuitsstream
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